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Mar 12, 2018 at 13:45 comment added joan @MaxWalczak I'd be interested to know what throughput improvement you can manage with that change. It could be significant or irrelevant depending on how the driver works.
Mar 12, 2018 at 13:40 vote accept Max Walczak
Mar 12, 2018 at 13:40 comment added Max Walczak This seems to solve my problem quite exactly! Thank you a lot for your time and effort.
Mar 12, 2018 at 12:47 comment added joan You need to look at the spi_ioc_transfer structure. Each member is one SPI transaction. The cs_change will presumably set the CS change around that transaction. You pass an array of those structures to the SPI transfer. If this is not how you/wiringPi are handling multiple transactions then I've wasted your time (although it's quite easy to write your own version in C, wiringPi is a thin wrapper around the SPI driver).
Mar 12, 2018 at 12:18 comment added Max Walczak Can you elaborate on how is the cs_change executed? If I have spi.len of 128 bits and set bits per word to 16, will it turn CS on and off every 16 bits being transferred? That is exactly what I would want to achieve.
Mar 12, 2018 at 11:42 comment added joan I have not tested multiple SPI requests with the kernel driver. There is a spi.cs_change field in the C IOCTL. Perhaps edit the wiringPi source wiringPiSPI.c and change the value to 1 and then rebuild the library. That might then toggle the chip select at each transaction.
Mar 12, 2018 at 11:34 comment added Max Walczak Does it mean that when I call a single read in a loop it will be much faster than the equivalent with Linux SPI driver? Thanks a lot for the link - I've been looking for something like this for a long time and I found nothing! From the plots I can see that the speed is almost the same as with linux spi driver at 3 bytes per sample and 2MHz
Mar 12, 2018 at 10:44 history answered joan CC BY-SA 3.0