CE1 not going low for pigpio.spi_open() with flags

Question

I'm attempting to modify joan's test script (https://raspberrypi.stackexchange.com/a/44320/42126) for an RPi SPI master to communicate with an Atmega328P slave. I cannot change which GPIO pins I have configured due to hardware constraints in my project.

I need to use CE1(BCM7) and auxiliary SPI (BCM[19:21])

My test script is below:

pi = pigpio.pi()
channel = 1             # use CE1
flags = 0b100000000;  # use auxiliary SPI
h = pi.spi_open(channel, baud)
#h = pi.spi_open(channel, baud, flags)

n = 0
while True:
    n += 1
    pi.spi_xfer(h, "Message {}\n".format(n))
    time.sleep(1)

pi.spi_close(h)
pi.stop()

I'm using an analog discovery unit as a logic analyzer, connected as follows:

 DIO0 CE1 (BCM7(
 DIO1 SCK0 (BCM11)
 DIO2 MOSI0 (BCM10)
 DIO3 MISO0 (BCM9)
 DIO4 SCK1 (BCM21)
 DIO5 MOSI1 (BCM20)
 DIO6 MISO1 (BCM19)
 DIO7 CE2 (BCM16)

If I use the flag to select auxiliary spi, I get clock and data, but SS doesn't go low.

If I don't use a flag and monitor primary SPI with CE1, I get a good connection

If I use channel 2 (the one normally associated with auxilary spi), I get data as well as CS2 low (MISO is not connected to the slave for this sample)

It appears that channel 1 is not being brought low, but the documentation (http://abyz.me.uk/rpi/pigpio/python.html#spi_open) allows using channel 1 with auxiliary SPI. I don't see any flags that would conflict with this configuration ... am I doing something wrong or is this a bug?

Answer 1

This seem to be a misunderstanding. The usage of GPIO by the main and auxiliary SPI devices is as follows.

         MISO MOSI SCLK CE0 CE1 CE2
Main SPI  9   10   11    8   7   -
Aux SPI  19   20   21   18  17  16

If you want to use the auxiliary SPI with a non-standard chip select you will have to toggle the GPIO yourself.

This is straightforward. Set the selected GPIO low before each transfer and set it high afterwards.

E.g.

pi.write(7, 0)
(count, rx_data) = pi.spi_xfer(h, [1, 128, 0])
pi.write(7, 1)