spidev sanity check not working

Question

ArchARM on Raspberry Pi 3, spidev installed from AUR.

I'm trying to control a Waveshare device via SPI, and can't get SPI to work from Python.

The most basic sanity test I can think of is failing:

1. Bridged MISO and MOSI for SPI0 (pins 19,21 in this diagram)
2. Run this code as root:

#!/usr/bin/env python3
import spidev

spi = spidev.SpiDev()
spi.open(0, 0)

dat1=[1,2,3,4,5,6,7,7,7,7, 6, 5,5,5,5,5]
dat2 = spi.xfer(dat1)
print(dat1)
print(dat2)

3. Get the following output:

$ sudo ./pyloop.py 
[1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 6, 5, 5, 5, 5, 5]
[0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2]

I established these are the right pins because when I disconnected them the output changed to zeros.

What am I missing?

Thanks!

Answer 1

Everything looks OK.

Perhaps try:

(1) Set lower speed - spi.max_speed_hz = 100000.

And if problem does not go away,

(2) Send/recv less bytes, 1, 2, or 3 bytes

or

(3) Setup more SPI channels to compare and contrast (See Appendix A below.)

The reason for setting SPI speed to as low as 100kHz is to reduce noise, ringing, spikes/glitches etc. Actually for troubleshooting I usually set SPI to 10kHz, I2C to 10kHz, UART = 9600 baud.

However, for Rpi3B+ stretch, I2C only can do 100kHz (even you seem to be able to change it). For Rpi4B you can set I2C speed to even 10kHz. For UART, if you set speed very high, the no clock, asynchronous, TxD, RxD signals might get "out of sync", it is not noise problem.

And I did not suggest to change SPI mode (0,0) to others, because all these years I have been playing with perhaps 100+ SPI devices, only one or two uses mode (0,1)

Appendix A - Setting up more SPI channels

# dtoverlay to enable SPI Channal 1 and Channal 1
# /boot/config.txt dtoverlay setting 
# dtparam=i2c_arm=on
# dtparam=spi=on
# dtoverlay=spi1-3cs

# /dev/spi listing
# ls -l /dev/spi*
# should show the following:
# 1. /dev/spidev0.0
# 2. /dev/spidev0.1
# 3. /dev/spidev1.0
# 4. /dev/spidev1.1
# 5. /dev/spidev1.2