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Is it possible to use some sort of adapter, or even to solder a device to the Raspberry Pi board to support PCI or PCI express devices? I'm thinking smaller devices such as NICs or Sound Cards. I wouldn't think there would be enough voltage to run something such as a tuner or Graphics Card.

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  • PCi express is out of the question as the bus speed is too much for the ARM to handle plus its too wide (Too many I/O's) PCI migh be possible but there is no use
    – Piotr Kula
    Jun 28, 2013 at 21:39
  • You would run into huge issues with bottlenecking, it cannot be done.
    – user9166
    Aug 23, 2013 at 20:26
  • Well, using the IO pins would probably still be faster than USB. And what about using ISA, EISA, or maybe VESA? I know they are old, but they still have lower clock frequencies, and not many new ones exist. Or, what about making your own interface?
    – user34395
    Sep 5, 2015 at 4:39
  • @ppumkin PCIe will run at high bus speeds when the physical layer and devices support those speeds, but it's actually a pretty resilient protocol and will still work in fairly non-ideal situations at reduced speeds.
    – AJMansfield
    Aug 18, 2017 at 3:25
  • There's a raspberry pi competitor with a PCIe m.2 slot on the back: Rock Pi It's designed to be used with NVMe hard drives, but it could be possible to extend it out to full PCIe x4 with some sort of breakout board.
    – tux2603
    May 24, 2020 at 2:53

7 Answers 7

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I doubt this is possible. You would need some sort of bridge and something to connect it to.

Not sure why you would need to, NICs/Soundcards/tuners and more can plug into the USB

There are also USB video adapters if you want to add a second screen. There's not much point trying to hook up a high powered graphics card for games etc. The only reason I can think of is if you were using the GPU for coprocessing

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  • There IS one compelling use case... implementation of a Pi-based 802.11ac dual-band router that flawlessly does AP mode (or for that matter, does AP mode at all). There are a few USB 802.11n NICs that are rumored to semi-work in AP mode if you completely saturate the USB bus, but as a practical matter, if you want to really do AP mode properly, you either need a PCI-e bus to give you near-realtime access to the chip, or you're going to have to move all the AP-related logic to the other end of the USB bus (connecting the 802.11ac baseband chips themselves directly to a host Pi).
    – Bitbang3r
    Nov 18, 2013 at 19:18
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    Compelling or not, you are limited by the I/O bottlenecks in and out of the CPU. Remember that it's a fairly old, cost optimised chip.
    – John La Rooy
    Nov 18, 2013 at 22:39
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No, it's not possible. The Raspberry Pi is based on low budget arm SoC that has only usb bus, so it's impossible to attach PCI or PCIe card to it. Neither an adapter could be made.

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  • There are also called PCI-e USB only connectors?
    – Melroy van den Berg
    Jan 26, 2015 at 20:58
  • @danger89 Sorry, I can't get your question.
    – SileNT
    Feb 2, 2015 at 14:19
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The fastest the GPIO buffer can be addressed so far is 5.4MHz, but most addressing libraries max out around 70kHz: http://codeandlife.com/2012/07/03/benchmarking-raspberry-pi-gpio-speed/

The PCIe spec runs at 100MHz (frequency adjustable up to 200MHz). http://www.ni.com/white-paper/3767/en/

There may be a way to force a backward-compatible mode on PCIe and reduce it to the old PCI frequency at 33MHz, meaning there might be some overlap in the frequency ranges with extensive buffering. However, PCIe has a much wider bit width than GPIO, and requires a massive amount of software infrastructure to properly address, which the GPIO bus on the Pi simply doesn't have. PCI and PCIe are more than just interfaces, they include their own (complex) intermediate communications protocols, which you'd have to emulate somehow.

Could it be done? Sure, with proper software/hardware interfacing anything can be done. Kernel-level libraries can be written to override just about anything and buffer just about anything.

Should it be done? Well, what you're essentially trying to do is interface the fast wireless/PCIe bus with the slower Pi. That's what the Pi's USB bus already does, and does quite well, plus it does it natively and in a fully-supported fashion.

Trying to get PCI/PCIe running on the Pi would essentially be reinventing the wheel, and it would be doing it very hard. Might be an interesting learning exercise, if you have a few months to spare - bearing in mind that it's likely you'll hit a wall and be unable to move forward at any time. Sounds singularly unrewarding to me. ;-)

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    If you decide to proceed, there's always this: pinouts.ru/Slots/pci_express_pinout.shtml Note that your main problem is going to be clock speed, not interface width. Yes, some PCIe/PCIx cards have lots of pins. No, not all do, and many don't need huge pinouts. There are some very tiny 1x cards out there. Since the clock runs at 2.5Gbps, you need some sort of buffering interface with lots of storage, and I'm not sure the Pi's processor is capable of playing catch-up to that much data, given that you're not going to be running in real-time.
    – yogsodoth
    Aug 7, 2015 at 17:52
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The PCIE2RASPI board can join a PCIE board (mini or standard) with a CycloneIV GX Fpga to the IO signals of the Raspberry I/O board. Cutting the power pins on the header it can be fitted by a flat cable to a Raspberry hist. The Fpga on mini PCIe host an end point that have master target capability, de fact it make the Raspberry able to read or write the PC memory.

Look at: http://www.geb-enterprise.com/PRODUCTS/Mini_PCIe_to_Raspberry.html http://www.geb-enterprise.com/PRODUCTS/PCIe_Standard_PC_CARD.html

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    When you are suggesting one of your products you should make that clear in your answer.
    – Steve Robillard
    Dec 3, 2015 at 19:40
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It may actually be possible by utilizing ALL of the GPIO pins, then multiplexing half of them into a single output line (PCIe x1) at 100MHz and demultiplexing the input line into the other half. I read at the same link (the first one) stated in yogsodoth's answer that native C code could manage about 22MHz via the -O3 optimizer. (Just remember, logic level shifters are a must.) The software would be an even bigger pain in the neck to interface, though, as PCIe is not natively supported...

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Maybe the GPIO pins could connect to something that can address the PCIx? It would mean a big hack and the question is. How fast can data be read in from the GPIO pins.

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    Not fast enough.
    – Jivings
    Oct 10, 2012 at 16:59
  • Agreed- Not fast enough and it HAS to be realtime. Linux is not realtime.
    – Piotr Kula
    Oct 11, 2012 at 16:14
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No, that is not possible. Gpio hardware is not designed to work at PCI speeds.

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