Is it possible to use some sort of adapter, or even to solder a device to the Raspberry Pi board to support PCI or PCI express devices? I'm thinking smaller devices such as NICs or Sound Cards. I wouldn't think there would be enough voltage to run something such as a tuner or Graphics Card.
I doubt this is possible. You would need some sort of bridge and something to connect it to.
Not sure why you would need to, NICs/Soundcards/tuners and more can plug into the USB
There are also USB video adapters if you want to add a second screen. There's not much point trying to hook up a high powered graphics card for games etc. The only reason I can think of is if you were using the GPU for coprocessing
The fastest the GPIO buffer can be addressed so far is 5.4MHz, but most addressing libraries max out around 70kHz: http://codeandlife.com/2012/07/03/benchmarking-raspberry-pi-gpio-speed/
The PCIe spec runs at 100MHz (frequency adjustable up to 200MHz). http://www.ni.com/white-paper/3767/en/
There may be a way to force a backward-compatible mode on PCIe and reduce it to the old PCI frequency at 33MHz, meaning there might be some overlap in the frequency ranges with extensive buffering. However, PCIe has a much wider bit width than GPIO, and requires a massive amount of software infrastructure to properly address, which the GPIO bus on the Pi simply doesn't have. PCI and PCIe are more than just interfaces, they include their own (complex) intermediate communications protocols, which you'd have to emulate somehow.
Could it be done? Sure, with proper software/hardware interfacing anything can be done. Kernel-level libraries can be written to override just about anything and buffer just about anything.
Should it be done? Well, what you're essentially trying to do is interface the fast wireless/PCIe bus with the slower Pi. That's what the Pi's USB bus already does, and does quite well, plus it does it natively and in a fully-supported fashion.
Trying to get PCI/PCIe running on the Pi would essentially be reinventing the wheel, and it would be doing it very hard. Might be an interesting learning exercise, if you have a few months to spare - bearing in mind that it's likely you'll hit a wall and be unable to move forward at any time. Sounds singularly unrewarding to me. ;-)
The PCIE2RASPI board can join a PCIE board (mini or standard) with a CycloneIV GX Fpga to the IO signals of the Raspberry I/O board. Cutting the power pins on the header it can be fitted by a flat cable to a Raspberry hist. The Fpga on mini PCIe host an end point that have master target capability, de fact it make the Raspberry able to read or write the PC memory.
It may actually be possible by utilizing ALL of the GPIO pins, then multiplexing half of them into a single output line (PCIe x1) at 100MHz and demultiplexing the input line into the other half. I read at the same link (the first one) stated in yogsodoth's answer that native C code could manage about 22MHz via the -O3 optimizer. (Just remember, logic level shifters are a must.) The software would be an even bigger pain in the neck to interface, though, as PCIe is not natively supported...