What are the capabalities of genral purpose clocks

Hello I would like to know what are the frequencies (and its max divisor) i can use with the general purpose clocks pin on the raspberry pi 3B+/4. currently my circuit is using this as a Clock input. I would like to remove that component and just instead use onboard one.

I plan to have 3 clock: 8.1920MHZ, 4.0960MHZ, 2.048MHZ. on the 3 GPIO CLCK. of course it wouldnt be exactly that but i hope to get somewhere close to it.

How clean are its signal? I found this image that at 12Mhz its starting to look sinusoidal is it true?

• What do you mean? You now use that chip as a clock source but you want to use the internal BCM2711 clock or what? And get that clock signal out? – Swedgin Jun 9 '20 at 8:35
• As for your scope image. What's the bandwidth of that thing? Do you know the Nyquist theorem? You need at least twice the bandwidth of the max freq in your signal (so at least 24MHz) and that can result in the sine wave you see. – Swedgin Jun 9 '20 at 8:36
• @Swedgin what are you talking about XD. although thats not my oscilloscope, its written at the top 2 Giga Samples per second. – Jack Jun 9 '20 at 12:43
• 2 giga samples per second does not mean that it can measure a square wave of 12MHz perfectly. That clock cycle looks good. – Swedgin Jun 9 '20 at 13:23

As far as I am aware only CLK0 and CLK2 are available. CLK1 is/was reserved for system use.

The CLK clock source is configurable. By default I believe it to be 19.2 MHz on all but the Pi4B where it is 54 MHz. My pigpio uses the 500 Mhz (Pi 4B 750 MHz) PLLD as the clock source.

The divisor can be any even integer in the range 2 to 4096. You can use MASH to interpolate between those values but it will vary the frequency.

The PWM chip has two channels which you could drive as a clock. That can use the same clock sources and dividers.

A peripheral may be individually set to one of the following 16 clock sources (peripheral such as CLK, SPI, PWM, I2C, etc).

``````0     0 Hz     Ground
1     19.2 MHz oscillator
2     0 Hz     testdebug0
3     0 Hz     testdebug1
4     0 Hz     PLLA
5     1000 MHz PLLC (changes with overclock settings)
6     500 MHz  PLLD
7     216 MHz  HDMI auxiliary
8-15  0 Hz     Ground
``````
• Thats cool, for pi4 at 54MHZ divisor set at 621 is close enough. What is the meaning of PLLD? Oh the PWM pin can perform the same function as the GPCLKs? are there downsides? because BCM 13 is placed conviniently near the buffers in my circuit – Jack Jun 9 '20 at 10:28
• By the way which clock does the SPI use? using the same clock(or same parent clock) as SPI gives slightly better performance on my circuit – Jack Jun 9 '20 at 10:38