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I was looking at the 40-pin pinout and I couldn't help noticing that there doesn't seem to be a logical order to the placement of the GPIO pins. Even allowing that there may be a technical reason for them to not all be grouped together, if you follow the physical pin order and ignore non-GPIO pins, the GPIO pins appear in this order:

2 3 4 14 15 17 18 27 22 23 24 10 9 25 11 8 7 5 6 12 13 19 16 26 20 21

I'm curious if there's some technical or logical reason that the pins are numbered in such a way. I would have expected that the GPIO pins number could be adjusted logically within the RPi so that they could have an intuitive order (for example, why not just swap the names of GPIO14 and GPIO5?), so I'm guessing there's a good rationale that I simply don't understand.

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2 Answers 2

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Typically, hardware features like PWM/interfaces/interrupts/etc are available on specific GPIOs by hardware. This has nothing to do with board layout but the chip's pinout. If you take a look at pin configurations of any MCU/CPU you'll find that they are numbered "arbitrarily" as well. In deed, the layouter of the board faces the same problem as the one who designes the chip: providing a pinlayout with e.g. ascending order will make layout more complicated (will need more vias on pcb or a larger area on the silicon waver...) and doing so - on the other hand - has no technical advantages. It might be more comfortable for the programmer, but it's easy to introduce a hardware abstraction layer in software. For the final system it doesn't matter if pins have arbitrary numbering, so it's better to have the least complicated/cheapest hardware layout.

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The GPIO/BCM pin numbers refer to the GPIO numbers at the SoC (chip) level. 28 of them are routed from the SoC to physical pins in the board. They're presumably just routed in a sensible way in terms of PCB routing. They could have been abstracted in software but they never were, and there are various board layouts (Pi 1 original, Pi 1 rev 2 onwards, and compute modules) so at least using the BCM numbers is consistent regardless of the board layout.

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    Now that you mention it, I guess with the various board layouts, and with each pin on the chip itself having different capabilities (some can be used for PWM, some for SPI, etc), it's less of a hassle to let the physical pin placement differ from model to model than to have GPIOX be PWM on one model and GPIOY be PWM on another. Sounds way better for code portability.
    – Devsman
    Dec 31, 2020 at 21:52

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