1

Folks,

I have attached 2 SC16IS752 breakout boards to SPI0.

This way I can have 4 UARTs (SC0..3).

All four ports are working, but I have these strange lines during boot:

[   13.239108] spi-bcm2835 20204000.spi: chipselect 1 already in use
[   13.239160] spi_master spi0: spi_device register error /soc/spi@7e204000/spidev@1
[   13.239198] spi_master spi0: Failed to create SPI device for /soc/spi@7e204000/spidev@1

For the two boards I'm using SPI0 on GPIO9,10,11; Board1 uses CE0 (GPIO8), Board2 uses CE1 (GPIO7).

What can cause this error message, and do I have to fear of it?

This is my DTS I'm using for this purpose:

/dts-v1/;
/plugin/;

/{
    compatible = "brcm,bcm2835";

    fragment@0 {
        target = <&spidev0>;
        __overlay__ {
            status = "disabled";
        };
    };

    fragment@1 {
        target = <&spi0>;
        __overlay__ {
            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";

            sc16is752_0: sc16is752@0 {
                compatible = "nxp,sc16is752";
                reg = <0>; /* CE0 */
                clocks = <&sc16is752_0_clk>;
                interrupt-parent = <&gpio>;
                interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
                gpio-controller;
                #gpio-cells = <2>;
                spi-max-frequency = <4000000>;
            };
        };
    };

    fragment@2 {
        target = <&spi0>;
        __overlay__ {
            #address-cells = <1>;
            #size-cells = <0>;
            status = "okay";

            sc16is752_1 sc16is752@1 {
                compatible = "nxp,sc16is752";
                reg = <1>; /* CE1 */
                clocks = <&sc16is752_1_clk>;
                interrupt-parent = <&gpio>;
                interrupts = <26 2>; /* IRQ_TYPE_EDGE_FALLING */
                gpio-controller;
                #gpio-cells = <2>;
                spi-max-frequency = <4000000>;
            };
        };
    };

    fragment@3 {
        target-path = "/";
        __overlay__ {
            sc16is752_0_clk: sc16is752_spi0_0_clk {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <14745600>;
            };
        };
    };

    fragment@4 {
        target-path = "/";
        __overlay__ {
            sc16is752_1_clk: sc16is752_spi0_1_clk {
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <14745600>;
            };
        };
    };

    __overrides__ {
        int0_pin = <&sc16is752_0>,"interrupts:0";
        xtal0 = <&sc16is752_0_clk>,"clock-frequency:0";

        int1_pin = <&sc16is752_1>,"interrupts:0";
        xtal1 = <&sc16is752_1_clk>,"clock-frequency:0";
    };
};
4
  • Do you have any other devices activated in config.txt that use the SPI0 bus?
    – PMF
    Oct 5, 2021 at 19:03
  • Nothing I'm aware of. However I've created my own DTB for this to work, and I might made some mistakes. I'm updating this issue now.
    – Daniel
    Oct 5, 2021 at 19:22
  • Now you lost me, I never had to edit one of those. A remark: You didn't specify what Pi model you're using, but the Pi4 has up to 6 Uarts built-in already.
    – PMF
    Oct 5, 2021 at 19:34
  • I'm using PI Zero. You can see that also from this line in code: compatible = "brcm,bcm2835";.
    – Daniel
    Oct 6, 2021 at 7:04

1 Answer 1

1

I had to use another disabler for SPI0 with CE1:

fragment@x {
    target = <&spidev1>;
    __overlay__ {
        status = "disabled";
    };
};
1
  • Nice one thanks very helpful! So spidev 1 and one of your fragments were both requesting the same chipselect? That'd do it Dec 9, 2022 at 3:27

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