I'm just learning about Pico Programmable IO (PIO). The examples I see cover only single pin communication. I'm wondering whether PIO can handle multi-pin communication (like I2C having one pin each for clock and data). In particular suspicious about how synchronizing against a clock signal works, generated externally or from within.
If it can, how would I "approach" implementing that sort of protocol, breaking the complete problem down to smaller pieces? E.g program structure.
As an example I've salvaged an EEPROM from an old PCI LAN circuit, 93LC46. From the datasheet:
- CS: Chip Select ("A low level ... forces it into Standby mode")
- CLK: Clock
- DI: Data In
- DO: Data Out
8-bit or 16-bit mode configured by yet another pin.
Something I suspect is significant for timing DI/DO to CLK:
And finally a few notes about CLK:
The serial clock is used to synchronize the communication between a master device and the 93LC46/56/66. Opcode, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to clock high time (TCKH) and clock low time (TCKL). This gives the controlling master freedom in preparing opcode, address and data.
(Not asking for a complete solution, just enough to spare me wasting too much time hustling towards dead ends.)