The limitation is going to be how fast the CPU can 'deliver' the data. To get max. speed you are going to have to write some tight assembly / C code (as well as overclock the CPU)
The 'standard' pins are driven '(one) bit at a time', whilst the GPIO uSB has, I believe, a 16 bit pipe-line (it is, I gather, theoretically capable of more than 300mbs = remember, the 4 x USB 2.0 ports PLUS the 100mbs Eterhnet on the B+ all have to go down the same pipe (actually, they can't, at least not a full speed))
There is also the 'SPI', 'I2C' and 'Serial UART Link' GPIO pins. APPARENTLY these support some form of DMA (plus they have some sort of 'shift register' pipeline), however the drive clocks are limited to some max. multiplier .. see here http://www.raspberrypi.org/forums/viewtopic.php?f=44&t=17559 .. the same link suggests that the pins themselves acan go to at least 100MHZ (but, again, I refer you to the USB pins ..)