3

I've been looking into switching a floating point heavy application from my B+ to a B 2. However, there are some things I don't quite understand about the 2:

  • Is there a FPU for each core or is there only one that is shared by all cores?
  • What compiler flags do I need for the 2 in order to use the hardware FPU when compiling my code with G++ (GCC)? Is it the same as the B+?
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My interpretation of the Cortex-A7 MPCore ™ is that there is an FPU per core.

In particular section 1.5 of the Technical Reference Manual says the FPU can be configured per core but goes on to say that if the core has NEON the core has an FPU. I believe all the cores have NEON so all have an FPU.

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/BABDBBIH.html

Your interpretation may differ.

As regards your second question I cross-compile for a Raspbian (hard float) B+ on a laptop. The same images work on the Pi 2.


EDITED TO ADD

cat /proc/cpuinfo shows an identical feature set per core. vfp is floating point.

Features    : half thumb fastmult vfp edsp neon vfpv3 tls vfpv4 idiva idivt vfpd32 lpae evtstrm 

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