It is not obvious but the LBO output pin on that PWB is connected to the corresponding pin on the IC and to the base of a PNP Common-Emitter stage - however that transistor does have a built-in pair of resistors (a "series" one between the base input pin and the actual transistor base and a "potential-divider" one between the actual transistor base and emitter" together these do provide some sort of pull-up on that output.
If that "series" resistor is quite large it is not possible to be certain that it would be strong enough to also pull the LBO pin up strongly enough to drive a RPi GPIO pin to the high state unless that was configured to have it's own input configured with a "Pull-up" (which actually is the case for the first few GPIO pins by default I believe, unless over-ridden in the config.txt file or by some other means).
The nature of an "open-drain" output is that it is almost like a single-pole single way switch between the output pin and ground- when the output is in a "high" logic state the switch is open and the voltage on the pin floats to what ever the external components set but when the output is in a "low" logic state the switch is closed and the pin is pulled to ground hard and will draw current in from what ever (positive voltage sourced) circuitry is connected. The only complication is that it is probably not good to let the external supply to whatever "pull-up" is used to exceed the supply to the IC with the "open-drain" output unless the resistor in series with that is high enough to prevent damaging currents to flow into that output via the (parasitic/protection) diodes that usually exist between all I/O pins on an IC and the positive supply rail (anode to pin, cathode to positive supply rail) which help to protect against static damage to a naked IC and are often inherent in the physical semiconductor design!
Those same type of parasitic/protection diodes are on the Raspberry Pi's GPIO pins and that means that when the RPi is un-powered a GPIO pin will look like a diode on the GPIO pin with the anode on the GPIO pin and the cathode to the (now at ground voltage as the device is un-powered) RPi 3.3V rail. Anything that is connected to the RPi - like an open drain output from the Powerboost board would also be grounded via that diode- fair enough that this is not an issue when the RPi is switched off because the Powerboost has a low-battery but a direct connection of the LBO output with an pull-up to the RPi's 3.3V rail will also illuminate the LBO-LED on the Powerboost board until the RPi is powered-up!
I would suggest the following circuit:
R1 provides enough pull-up current to turn on Q1 under "normal" conditions, R2 prevents the forward biased Base-Emitter junction from clamping the LBO pin to only 0.7V above ground when the transistor is turned on - otherwise the LBO LED on the Power Boost board would be constantly on, even when the battery was above 3.2 volts! R3 permits enough current to flow through Q1 to allow the transistor to saturate so that a typical VCEsat of 0.5 Volts can be achieve which will be the input level via R4 that the RPi will see (no internal Pull-up or Pull-down should be set on that GPIO pin). When the Power boost battery level drops below the 3.2V level the drive to Q1's base is still enough to operate but when the LB Output is pulled to ground level by the IC on the Power boost module there will be no more drive current, Q1 will switch off and its collector voltage will raise to the 3.3V RPi level, by the action of R3 so when the RPi detects a High level on the selected pin then it is time to have a GPIO monitoring script run in the background from
rc.local (or whatever new-fangled method
systemd forces its users to use) to execute
shutdown -h -p now Battery exhausted on PowerBoost unit!
Hope this is of some use.
P.S. See my question at how-does-init-get-to-know-about-power-events this does have a Python script that monitors a GPIO pin for a change to initiate a shutdown which you ought to be able to modify to use with this answer.