I am looking for the memory address of the SD card controller, or a way to access the appropriate DMA channel to read and write data through.
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Not sure I'm following that either. Can you contextualise 'physical address'? What do you need it for?– gooberingCommented Jul 4, 2016 at 16:39
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Ditto and to rephrase: What someone means by "physical address" here probably depends upon context. If you can explain the context (e.g., what you need this address for) someone can probably help you. Otherwise it is just too ambiguous.– goldilocks ♦Commented Jul 4, 2016 at 16:47
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I need the physical address for DMA controller to send and receive data– IamUCommented Jul 4, 2016 at 16:48
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Related: raspberrypi.org/forums/viewtopic.php?f=66&t=63676– goldilocks ♦Commented Jul 4, 2016 at 17:09
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1 Answer
There are two sorts of address you might be asking about for the Raspberry Pi: The bus-visible address (same address space used by the Videocore running the firmware and by the DMA engine), and the physical address used by the ARM (which is different depending on if you're using a Pi1 or Pi2/3). There are also two SD controllers you might be asking about: The custom SDHOST controller and the Arasan SDHCI controller.
The register ranges of the devices can be found in your device tree. Source in the downstream kernel tree is at:
arch/arm/boot/dts/bcm2708_common.dtsi
Definition for the SDHCI controller:
mmc: mmc@7e300000 {
compatible = "brcm,bcm2835-mmc";
reg = <0x7e300000 0x100>;
...
}
Definition for the SDHOST controller:
sdhost: sdhost@7e202000 {
compatible = "brcm,bcm2835-sdhost";
reg = <0x7e202000 0x100>;
...
}
Those "reg" values are the start bus address and their length. To convert those to a Pi2 or Pi1 physical address, replace the first two digits with "0x20" on a Pi1 or "0x3f" on Pi2/3. (So, SDHOST is at 0x3f202000 on the Pi3).
Within those register ranges will be registers used as part of DMAing to/from the controller, and there will be a DREQ channel used for rate-limiting the DMA, but asking about those without having also written an entire DMA controller driver and taken control of that DMA controller from Linux, doesn't make any sense.
