I am working on a project that requires me to sample 6 microphones as close to simultaneously as possible at a rate of at least 11 kHz each and then run a processing algorithm on the data in real time. I have been using a Raspberry Pi Zero, since it is important that I use a very small computer. The microphones need to be rather small as well, so I am currently using ADMP401 microphone breakouts from Sparkfun. They output an analog voltage, which I am reading through MCP3002 ADC chips with a C++ program. I am using the
spidev library and the
ioctl function to sample the ADC's. With this setup, I have been unable to consistently sample just one microphone faster than 10 kHz.
My biggest issue is with delays between SPI transmissions. I have tested a loop that simply samples the ADC over and over. Between each sample there is usually a 60 to 80 microsecond delay between the clock line sequences and sometimes it is significantly longer. (I verified this with an oscilloscope). The length of this delay is not affected by the SPI frequency that I am setting, even though the clock rate does change when I change the SPI frequency. This delay is not likely due to the conversion time of the ADC since its data sheet says it has a sample rate between 75,000 and 200,000 samples per second, which corresponds to a sampling interval range of 5 to 13 microseconds. The other big issue is that the inconsistent nature of the delay between samples lowers the quality of my data processing.
My probable next approach is to purchase a multi-channel, simultaneous sampling ADC, which I will connect to my 6 microphones. I will use an Arduino to sample the ADC and ensure a consistent frequency with a timer interrupt. I will store the data in an array of 50 to 100 samples and then each time the array fills up, I will send its contents to the Raspberry Pi with SPI. Hopefully this will greatly diminish the impact of the inter-packet delays. Does anyone see any potential issue with this approach?
I feel like there should be another way to do this without using an Arduino. I did a little research into improving SPI frequency and I came upon this thread which spawned the project discussed here. If I tried to build my own kernel (am I saying that right?) for the Pi with this approach, would it lessen the inter-packet delay or just improve the clock frequency within each packet? Should I write a Linux device driver or kernel module as discussed here?
Perhaps the Raspberry Pi isn't even the best CPU for my project. Someone recommended using an FPGA. Is that appropriate? I am open to changing anything and everything about my approach.