Short Answer: No, this type of data copy is quite fast, probably 2 ops per cycle, this is practically as fast as the core can move data around. To convince yourself, just look at the disassembly.
Additionally, There is no way, that you will get the full throughput you desire from a kernel module, there is too much stuff happening in linux kernel constantly. Your limit will be CPU scheduling for the module code to execute and not the read speed of the module itself. You would need to run real time kernel or baremetal code.
Note: By Parallel ADC I'm assuming you are referring to an ADC constructed from a resistor network using GPIO ports of the raspberry pi.
Other Answer: You are chasing a ghost, 12MHz sampling with a simple ADC like this is unphysical, the electrical response of the A/D circuit is probably in the KHz at most.
I will challenge your assertion
but the software side is a bottleneck
Disagree, there is a glaring electrical bottle neck. No way your simple ADC will respond at
40MHZ or even
Remember the step response of your ADC is limited by RC time constant. You should estimate this first as it determines the a practical max sampling rate. A resistor based ADC is a massive Capacitance beast, this time constant will be very large and limit your response to significantly less than a MHz.
Put another way, the ADC acts (and IS!) a Low Pass Filter and a 12MHZ sampling rate is unrealistic. Dedicated ADC's designed to run at those rates are beasts that require careful electrical routing and signal conditioning.