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The following is the description of the operation I am working on using CodeSYS:

What : Interfacing NiRen CAN interface with Raspberry PI B+

Why : To have RasPI behave like a transmitting node on the CAN bus.

How : MCP2515 connected to the Raspberry PI via SPI interface

Questions : 1.1. Per the MCP2515 datasheet, every bit has a bit construction, which is mainly associated with the TIME QUANTA (TQ). The formula for TQ being TQ = 2.BRP.Tosc

   What is the BRP?

   What is Tosc?

1.2. How do you select the oscillator frequency for using it in the program?

  1. In the configuration register for MCP2515, how do you determine and set the values of BRP bits?

  2. How do you decide upon the values for SJW, PROP_SEG, PH_SEG1, PH_SEG2 and Sampling point?

Any bit of information on the above mentioned queries will be highly appreciated.

(PS: I am NOT using the CAN bus example available on CodeSYS)

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Question

Set up = Rpi3B+ using SPI MCP2515 CAN controller to interface NiRen

Q1. TIME QUANTA TQ = 2.BRP.Tosc, What are BRP and Tosc?

Q2. How to select oscillator frequency?

Q3. Configuration register how to determine and set the values of BRP bits?

Q4. How to decide the values for SJW, PROP_SEG, PH_SEG1, PH_SEG2 and Sampling point?

Short Answer

  1. Well, for MCP2515, "quantum" means the smallest integer time unit. The name of this smallest unit is call Tq (Time Quanta).

  2. There is the oscillator, or master clock, which outputs pulses or ticks. For example, if the oscillator is 1 MHz, then there are 1 million pulses per second, and each pulse width, or period is 1uS. This oscillator period is called Tosc.

  3. Tq is derived from Tosc. Tq period is twice the Tosc period. In other words, Tq period is twice Tosc period, equals to 2 uS.

  4. The confusion arises because the Tq can be adjusting a programmable scaler, called the Baud Rate Prescaler, BRP.

  5. I am just thinking aloud. You need to read carefully Section 5 and the related timing charts to see if I am not that precise in explaining things. You also need to study Fig 5.1 carefully to see how BRP is implemented as a 6 bit integer in the config register Config 1, address 0x2A.

To fully understand what is going on, I would suggest you to buy the US$2 MCP2505 modules, modify the config register's BRP and see how Tq and "bit" varies correspondingly. Here "bit" is not a binary digit, but another thing defined in the datasheet, ...

/ to continue, ...

Long Answer

So you have 4 questions. For the first question, do the following 2 steps:

Step 1 - Read Section 5 at least 10 times and then stare at the following 2 diagrams for another 10 minutes.

timing

fig 5.1

Step 2 - Close your eyes, repeat paragraph 5.3 and draw the pictures inside your little head. If you cannot do it, then repeat the two steps.

/ to continue, ...

References

MCP2515 Stand-Alone CAN Controller with SPI Interface Datasheet

MCP2515 SPI CAN Bus Controller TJA1050 Receiver Module - ¥14

CAN Bus - Wikipedia

Appendices

Appendix A - Bit Timing

5.0 BIT TIMING

All nodes on a given CAN bus must have the same Nominal Bit Rate (NBR). The CAN protocol uses NonReturn-to-Zero (NRZ) coding, which does not encode a clock within the data stream. Therefore, the receive clock must be recovered by the receiving nodes and synchronized to the transmitter’s clock.

As oscillators and transmission times may vary from node to node, the receiver must have some type of Phase-Locked Loop (PLL) synchronized to data transmission edges to synchronize and maintain the receiver clock. Since the data is NRZ coded, it is necessary to include bit-stuffing to ensure that an edge occurs, at least every six bit times, to maintain the Digital Phase-Locked Loop (DPLL) synchronization.

The bit timing of the MCP2515 is implemented using a DPLL that is configured to synchronize to the incoming data, as well as provide the nominal timing for the transmitted data. The DPLL breaks each bit time into multiple segments made up of minimal periods of time, called the Time Quanta (TQ).

Bus timing functions executed within the bit time frame (such as synchronization to the local oscillator, network transmission delay compensation and sample point positioning) are defined by the programmable Bit Timing Logic (BTL) of the DPLL.

5.1 The CAN Bit Time

All devices on the CAN bus must use the same bit rate. However, all devices are not required to have the same master oscillator clock frequency. For the different clock frequencies of the individual devices, the bit rate has to be adjusted by appropriately setting the Baud Rate Prescaler and number of Time Quanta in each segment.

The CAN bit time is made up of non-overlapping segments. Each of these segments is made up of integer units, called Time Quanta (TQ), explained later in this data sheet. The Nominal Bit Rate (NBR) is defined in the CAN specification as the number of bits per second, transmitted by an ideal transmitter, with no resynchronization. ...

Appendix B - MCP2515 Block Diagram

mcp2515 block diagram

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